transcript on
if {[file exists rtl_work]} {
	vdel -lib rtl_work -all
}
vlib rtl_work
vmap work rtl_work

vcom -93 -work work {J:/book/Timer_VHDL/FREQUENCY_DIVIDER.vhd}
vcom -93 -work work {J:/book/Timer_VHDL/BCD_COUNTER.vhd}
vcom -93 -work work {J:/book/Timer_VHDL/SEG_CONVERTER.vhd}
vcom -93 -work work {J:/book/Timer_VHDL/TIME_TOP.vhd}

vcom -93 -work work {J:/book/Timer_VHDL/simulation/modelsim/TIME_TOP.vht}

vsim -t 1ps -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L cycloneiii -L rtl_work -L work -voptargs="+acc"  TIME_TOP_vhd_tst

do J:/book/Timer_VHDL/simulation/modelsim/Timer_Top.do
